IBM has been in the news this week for announcing a breakthrough in High-k Metal Gate Technology. Though IBM was the lead, they partnered with AMD and others to share risk and expense. Intel singularly announced a similar breakthrough the same week. I’ve provided what I believe is a sufficiently detailed summary of the breakthrough (I’ve been summarily disappointed by every article I’ve read). If you’re interested in the physics or math of it all, Wikipedia is, as always, fantastic.
Background:
Moore’s law for processor speeds is in jeopardy because of limitations imposed by the use of Silicone Dioxide to insulate circuitry in microchips. One problem with SiO2 is that 5 atoms thick is as thin as they can get it, imposing a hard limit on how small the chips can get. The second problem is that at that width, noticeable current begins to seep out (technically “leakage currents due to tunneling” results), lots of heat builds up and lots of power is consumed. It has proven very difficult to find a suitable replacement material.
The Solution:
IBM et al found that certain hafnium http://en.wikipedia.org/wiki/Hafnium alloys (probably Hafnium silicate - HfSiON) can be used as a more effective insulator than silicon dioxide and is planning to use the element to produce faster and more energy efficient chips, by allowing circuitry scaling to be reduced to less than 45 nanometers. Integrating high-k / metal gates will address the power consumption issue; a major barrier to scaling chips and continuing with Moore’s Law. It is thought that with this weeks announcements, Moore’s law has been extended through the next decade.
Another huge benefit to the Hafnium Solution is that it can be implemented without requiring major tooling or process changes in manufacturing. It seems that most of the alternative gate dielectric materials were impractical for existing manufacturing facilities resulting in potentially Billions of Dollars to move to the next generation of chip circuitry.
On-Topic Tangent:
Dr. Rajarao “Raj” Jammy was the project lead on this. He has 50+ patents and is one of those guys that you only ever see working in a University somewhere or at IBM. Anyway, there’s a great interview with here at Reed Electronics following a conference on High-k dielectrics. A quote:
…(In) reference to SiO2 or silicon oxide or silicon oxynitride gates, those gates with polysilicon electrodes have stopped scaling. So once these dielectric stacks or gate stacks have stopped scaling, we really had no option left. But for performance enhancement, people continue to use new ideas, like mobility enhancement. And therefore, they continue the scaling that the industry is so used to. But in some point in time we have to get back to the dielectric and try to see how we can continue to scale the dielectric also – part of it for the improvement in the coupling that we achieve at the channel, and therefore drive more current; but also the key part of it is reducing the leakage that comes from the gate dielectric.
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